1. Field of the Invention
The present invention relates generally to minimally packaged semiconductor devices having a protective layer of material on the active surfaces thereof and, more specifically, to the use of stereolithography to fabricate protective layers on the active surfaces of semiconductor device components. More particularly, the invention pertains to a method for fabricating protective structures on at least the active surfaces of semiconductor devices at the wafer level.
2. State of the Art
Minimally Packaged Semiconductor Devices
The large-scale production of particular types of semiconductor devices poses problems peculiar to the type of die, electronic circuits, external connectors and packaging. So-called xe2x80x9cflip-chipxe2x80x9d dice comprise electronic devices formed on a semiconductor substrate whose integrated circuitry terminates in an array of conductive sites on a die""s active surface, which conductive sites are typically referred to as xe2x80x9cbond pads.xe2x80x9d External conductive structures exemplified by well-known solder xe2x80x9cbumpsxe2x80x9d or xe2x80x9cballsxe2x80x9d are attached to the bond pads. In use, the flip-chip die is inverted, positioned atop a substrate with contact pads matching the locations of the conductive structures of the die, and the conductive structures bonded to the contact pads of the substrate. Chip scale, flip-chip configured packages are also typically disposed facedown over a higher-level substrate with which the chip scale packages are to be connected.
In order to fabricate flip-chip dice in large quantities, several semiconductor dice are simultaneously fabricated on a wafer. The wafer is then scribed or sawn into individual dice, and finishing operations including packaging are conducted on the singulated dice.
It is typically desirable to apply a supportive or protective layer on at least the active surfaces of semiconductor devices, such as flip-chip type dice and chip scale packages, that will be disposed facedown over a higher-level substrate. Polymers, glass, and other electrically nonconductive materials can be applied to one or both major surfaces of such semiconductor devices. Conventionally, such layers are applied to a surface of a semiconductor device prior to attaching conductive structures to contact pads exposed at that surface. As the contact pads must be exposed through the layer so conductive structures can be secured to the contact pads, openings must also be formed in the layer to accommodate the subsequent attachment of conductive structures. Thus, an etching or other more complex additional process step is required.
When conventional techniques are employed to form a protective layer on a surface of a semiconductor device, it is difficult to form the protective layer when conductive structures have already been secured to the contact pads because of the close packing and small interstitial spacing between the conductive structures on state of the art semiconductor devices. If introduced onto the surface over the conductive structures, the material of the supportive or protective layer will have to be removed from the conductive structures. If introduced between the conductive structures, air pockets and voids can form in the layer of supportive or protective material.
Moreover, air pockets or voids can form when a so-called xe2x80x9cunderfillxe2x80x9d material is introduced between a semiconductor device and a carrier substrate upon which the semiconductor device is disposed in facedown orientation. Although a vacuum may be used to draw the underfill into the interstices between the semiconductor device and the substrate, air pockets and voids nevertheless often persist in the underfill material. Thus, underfill layers with air pockets or voids may not completely support or protect the die or the conductive structures secured to the bond pads thereof. Furthermore, the use of a vacuum introduces undesirable additional complexity and time to the manufacturing process.
Accordingly, there is a need for a process by which supportive or protective layers can be formed on or applied to semiconductor devices without significantly increasing fabrication time and cost while producing a substantially uniform, solid, uninterrupted layer between contact pads of the semiconductor device or conductive structures secured thereto.
Stereolithography
In the past decade, a manufacturing technique termed xe2x80x9cstereolithography,xe2x80x9d also known as xe2x80x9clayered manufacturing,xe2x80x9d has evolved to a degree where it is employed in many industries.
Essentially, stereolithography, as conventionally practiced, involves utilizing a computer to generate a three-dimensional (3D) mathematical simulation or model of an object to be fabricated, such generation usually effected with 3D computer-aided design (CAD) software. The model or simulation is mathematically separated or xe2x80x9cslicedxe2x80x9d into a large number of relatively thin, parallel, usually vertically superimposed layers, each layer having defined boundaries and other features associated with the model (and thus the actual object to be fabricated) at the level of that layer within the exterior boundaries of the object. A complete assembly or stack of all of the layers defines the entire object, and surface resolution of the object is, in part, dependent upon the thickness of the layers.
The mathematical simulation or model is then employed to generate an actual object by building the object, layer by superimposed layer. A wide variety of approaches to stereolithography by different companies has resulted in techniques for fabrication of objects from both metallic and non-metallic materials. Regardless of the material employed to fabricate an object, stereolithographic techniques usually involve disposition of a layer of unconsolidated or unfixed material corresponding to each layer within the object boundaries, followed by selective consolidation or fixation of the material to at least a partially consolidated, or semisolid, state in those areas of a given layer corresponding to portions of the object, the consolidated or fixed material also at that time being substantially concurrently bonded to a lower layer of the object to be fabricated. The unconsolidated material employed to build an object may be supplied in particulate or liquid form, and the material itself may be consolidated or fixed or a separate binder material may be employed to bond material particles to one another and to those of a previously formed layer. In some instances, thin sheets of material may be superimposed to build an object, each sheet being fixed to a next-lower sheet and unwanted portions of each sheet removed, a stack of such sheets defining the completed object. When particulate materials are employed, resolution of object surfaces is highly dependent upon particle size, whereas when a liquid is employed, surface resolution is highly dependent upon the minimum surface area of the liquid which can be fixed and the minimum thickness of a layer that can be generated. Of course, in either case, resolution and accuracy of object reproduction from the CAD file is also dependent upon the ability of the apparatus used to fix the material to precisely track the mathematical instructions indicating solid areas and boundaries for each layer of material. Toward that end, and depending upon the layer being fixed, various fixation approaches have been employed, including particle bombardment (electron beams), disposing a binder or other fixative (such as by ink-jet printing techniques), or irradiation using heat or specific wavelength ranges.
An early application of stereolithography was to enable rapid fabrication of molds and prototypes of objects from CAD files. Thus, either male or female forms on which mold material might be disposed can be rapidly generated. Prototypes of objects might be built to verify the accuracy of the CAD file defining the object and to detect any design deficiencies and possible fabrication problems before a design is committed to large-scale production.
In more recent years, stereolithography has been employed to develop and refine object designs in relatively inexpensive materials, and has also been used to fabricate small quantities of objects where the cost of conventional fabrication techniques is prohibitive for same, such as in the case of plastic objects conventionally formed by injection molding. It is also known to employ stereolithography in the custom fabrication of products generally built in small quantities or where a product design is rendered only once. Finally, it has been appreciated in some industries that stereolithography provides a capability to fabricate products, such as those including closed interior chambers or convoluted passageways, which cannot be fabricated satisfactorily using conventional manufacturing techniques. It has also been recognized in some industries that a stereolithographic object or component may be formed or built around another, pre-existing object or component to create a larger product.
However, to the inventor""s knowledge, stereolithography has yet to be applied to mass production of articles in volumes of thousands or millions, or employed to produce, augment or enhance products including other, pre-existing components in large quantities, where minute component sizes are involved, and where extremely high resolution and a high degree of reproducibility of results are required. In particular, the inventor is not aware of the use of stereolithography to fabricate protective layers for use on semiconductor devices, such as flip-chip type semiconductor devices or chip scale packages. Furthermore, conventional stereolithography apparatus and methods fail to address the difficulties of precisely locating and orienting a number of pre-existing components for stereolithographic application of material thereto without the use of mechanical alignment techniques or to otherwise assuring precise, repeatable placement of components.
The present invention includes a method of forming minimally packaged semiconductor device components and the semiconductor device components so formed. As used herein, the term xe2x80x9cpackagexe2x80x9d as employed with reference to electrical components includes partial as well as full covering of a given semiconductor device surface with a dielectric material, and specifically includes a semiconductor die configured in a so-called xe2x80x9cchip scalexe2x80x9d package, wherein the package itself, including the die, is of substantially the same dimensions as, or only slightly larger than, the die itself.
The method is particularly useful for packaging semiconductor devices, such as flip-chip type semiconductor dice and chip scale packages, that are to be disposed face-down over a higher-level substrate. The invention further encompasses a method for forming a protective layer on a surface of a semiconductor device to protect the surface and to laterally protect or support external conductive structures, such as solder balls, protruding from the surface. The method can also be used to apply a protective layer to the backside of a semiconductor device.
According to another aspect, the invention includes a method for bonding a semiconductor device, such as a flip-chip type semiconductor device or chip scale package, facedown to a higher-level substrate, such as a carrier substrate, wherein conductive structures connecting contact pads of the semiconductor device with corresponding terminals of the substrate are fully laterally encapsulated and sealed by a dielectric polymer. Assemblies formed by this method are also within the scope of the present invention.
The protective layers according to the present invention can be applied to individual substrates or to groups of substrates, such as the semiconductor devices on an undiced or unsingulated wafer, prior to separating the substrates from each other. Preferably, a stereolithographic process is employed to apply protective material to the substrate.
In the stereolithographic method of fabricating the protective layer, one or more layers of photopolymer may be applied to the surface of a semiconductor device configured to contact conductive structures (e.g., the active surface of a semiconductor die) and, optionally, to the opposite side of the semiconductor device (e.g., the backside of the semiconductor die). When stereolithographic processes are employed to fabricate protective layers in accordance with teachings of the present invention, conductive structures such as solder balls can be secured to contact pads of the semiconductor device either before or after fabrication of the protective layer. if the protective material is applied to a surface of a semiconductor device having conductive structures on the contact pads thereof, the protective material can substantially hermetically seal the surface about each conductive structure. The protective layer at least laterally protects the conductive structures and the surface of the semiconductor device from damage during the die singulation and subsequent process steps, as well as in assembling the semiconductor device with other components and in use of the semiconductor device.
A complementary protective layer may also be disposed on a surface of a higher-level substrate to which the semiconductor device is to be joined. When protective material is disposed on the surface of the higher-level substrate, receptacles, through which the contact pads, or terminals, of the higher-level substrate are exposed, can be formed through the protective layer. These receptacles are configured to receive corresponding conductive structures protruding from a semiconductor device to be disposed facedown over the higher-level substrate.
Preferably, the protective layers on the semiconductor device and on the higher-level substrate upon which the semiconductor device is to be disposed are configured to abut upon assembly of the semiconductor device and the higher-level substrate while permitting conductive structure protruding from the semiconductor device to contact corresponding contact pads of the higher-level substrate. Thus, the abutting protective layers will provide a seal between the substrates, and no further packaging of the assembly is necessary. The protective layers on the two assembled structures may be further secured to each other, such as with adhesive or by subjecting the abutting protective layers to additional curing, such as heat, to form a unitary, substantially hermetic seal.
Moreover, the stereolithographic method has sufficient resolution so that when protective layers are fabricated on the surfaces of both a semiconductor device and the higher-level substrate upon which the semiconductor device is to be disposed, the combined, abutting protective layers form an underfill layer that is substantially free of undesirable air pockets (i.e., bubbles) or other voids.
In an exemplary stereolithographic process, a layer of liquid photopolymer is placed on the surface of a substrate (e.g., by submergence), and a focused laser beam is projected into the photopolymer layer to cure it and form a layer of at least partially cured polymer at desired locations on the surface of the substrate. The process may be repeated as required to form a series of built-up polymer layers of controlled thickness and location. Together, the layers comprise a single dielectric structure of precisely controlled dimensions and shape.
The packaging method of the present invention may be applied, by way of example and not limitation, to dice of a multi-die wafer or partial wafer, to singulated dice, to other types of semiconductor devices taken singly, simultaneously to a plurality of separate semiconductor devices, to one or more substrates, or simultaneously to groups including different types of semiconductor devices or substrates.
The present invention preferably employs computer-controlled, 3D CAD initiated, stereolithography techniques to fabricate the protective layers of the present invention. When stereolithographic processes are employed, the protective layers are each formed as either a single layer or a series of superimposed, contiguous, mutually adhered layers of material.
When the protective layers are fabricated directly on a semiconductor device or test substrate by use of stereolithography, the protective layers can be fabricated to extend to a given plane regardless of any irregularities on or nonplanarity of the surface of the semiconductor device on which the protective layer is fabricated.
The stereolithographic method of fabricating the protective layers of the present invention preferably includes the use of a machine vision system to locate the semiconductor devices or test substrates on which the protective layers are to be fabricated, as well as the features or other components on or associated with the semiconductor devices or test substrates (e.g., solder bumps, contact pads, conductor traces, etc.). The use of a machine vision system directs the alignment of a stereolithography system with each semiconductor device or test substrate for material disposition purposes. Accordingly, the semiconductor devices or test substrates need not be precisely mechanically aligned with any component of the stereolithography system to practice the stereolithographic embodiment of the method of the present invention.
In a preferred embodiment, the protective layer to be fabricated or positioned upon and secured to a semiconductor device or a test substrate in accordance with the invention is fabricated using precisely focused electromagnetic radiation in the form of an ultraviolet (UV) wavelength laser under control of a computer and responsive to input from a machine vision system, such as a pattern recognition system, to fix or cure selected regions of a layer of a liquid photopolymer material disposed on the substrate.